RISC-V Microarchitectural Design-Space Exploration in Chipyard
Dec 15, 2024 · 3 min read · RISC-V Chipyard BOOM Rocket Chip Memory Hierarchy Branch Prediction Performance Analysis ·ECE 5504 — Computer Architecture · Virginia Tech · Fall 2024 Team project with Alok Mehendale and Benjamin Rice. Benchmarks were divided between us: Alok took rsort and vvadd, Benjamin took towers and median, and I took FFT and SHA-256. Results were combined for the final report. Problem General-purpose processor …
Read MoreConcurrent Data Structures: Memory Reclamation Benchmarking (SEIZE)
Dec 10, 2024 · 10 min read · Concurrent Programming Lock-Free Algorithms Memory Management Rust Benchmarking Performance Analysis Data Structures ·Concurrent Data Structures: Memory Reclamation Benchmarking (SEIZE) ECE/CS 5510 — Multiprocessor Programming · Virginia Tech · Fall 2024 Course: Advanced Systems - Concurrent Programming | Semester: Fall 2025 Technical Focus: Lock-Free Algorithms, Memory Safety, Performance Analysis Problem Statement & Motivation …
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