Master's Projects Portfolio

Overview

Welcome to my graduate research and coursework portfolio. This page showcases projects across 3 semesters of my master's degree, spanning computer architecture, systems programming, compiler optimization, operating systems, and distributed systems security.


Semester 1 (Fall 2024) - Computer Architecture & Hardware

Cache Optimization on RISC-V Architecture

Hardware Architecture

Optimizes CPU cache performance through comparative analysis of LRU (Least Recently Used) and PLRU (Pseudo-LRU) replacement policies. Benchmarks FFT and SHA-256 algorithms on a custom RISC-V core, analyzing performance characteristics and memory access patterns.

  • Tech Stack: C, RISC-V, Chisel/Scala, Hardware Performance Monitoring
  • Requirements: RISC-V cross-compiler, Boom Core simulator, benchmark tools
  • Links: [GitHub - Coming Soon] | Performance Report

Semester 2 (Spring 2025) - Systems & Compilers

Advanced Linux Kernel Modules & Performance Monitoring

Systems

Develops custom Rust-based kernel modules for memory allocation, performance monitoring, and virtual device drivers. Includes fuzzing framework, stress testing tools, and security vulnerability assessment for kernel-space code.

  • Tech Stack: Rust 1.70+, Linux Kernel Modules, C compatibility layer
  • Requirements: Linux kernel 5.x+, Rust toolchain, kernel headers
  • Links: [GitHub - Coming Soon] | Project Details

LLVM Optimization Passes: Function Analysis & Local Optimizations

Compilers

Implements custom LLVM IR analysis and optimization passes including FunctionInfo analysis (loop detection, metrics) and LocalOpts (algebraic simplification, strength reduction, constant folding). Comprehensive test suite for verification.

  • Tech Stack: C++17, LLVM 14+, Intermediate Representation (IR)
  • Requirements: LLVM development libraries, C++17 compiler, Make/CMake
  • Links: [GitHub - Coming Soon] | Project Folder

Register Allocation Optimization through Coalescing & Live Range Splitting

Compilers

Develops optimized register allocator implementing Briggs-style coalescing and demand-driven live range splitting to reduce register spills and improve code generation efficiency. Benchmarked on SPEC/NPB suites.

  • Tech Stack: C++17, LLVM 14+, CMake 3.20+, Register Allocation Algorithms
  • Requirements: LLVM libraries, CMake, C++ compiler, NPB benchmark suite
  • Links: [GitHub - Coming Soon] | Performance Analysis

Semester 3 (Fall 2025) - Operating Systems & Security

Concurrent Data Structures: Memory Reclamation Benchmarking (SEIZE)

Concurrent Programming

Comprehensive benchmarking framework comparing memory reclamation schemes (Reference Counting, Hazard Pointers, Epoch-Based, Seize) across lock-free data structures (queues, hashmaps, linked lists). Measures latency, throughput, scalability, and memory usage patterns.

  • Tech Stack: Rust 1.70+, Criterion benchmarking, Concurrent algorithms
  • Requirements: Rust toolchain, Cargo, multi-core system for accurate measurements
  • Links: GitHub Repository | Benchmark Reports

IoT Security Case Study: Edge AI in Smart Grid Systems

Security

Master's-level case study analyzing cybersecurity threats in energy sector IoT/IIoT systems. Evaluates edge AI and federated learning as privacy-preserving solutions with differential privacy and secure aggregation. Covers incident analysis, regulatory compliance (NERC CIP, DOE, CISA), and mitigation strategies.

  • Tech Stack: LaTeX, Security analysis frameworks, Privacy-preserving ML
  • Requirements: PDF reader (for compiled paper)
  • Links: Academic Paper | Project Details

File System Consistency Checker (xv6 fsck)

Operating Systems

Implements filesystem checker tool for xv6 operating system to detect and report filesystem inconsistencies. Focuses on crash consistency principles and fsck logic following OSTEP textbook methodology.

  • Tech Stack: C, RISC-V, xv6-riscv, QEMU
  • Requirements: RISC-V cross-compiler, QEMU emulator, xv6-riscv environment
  • Links: [GitHub - Coming Soon] | Project Folder

Virtual Memory Analysis: Page Table Walker

Operating Systems

Dual-implementation tool for virtual memory analysis with user-space VA-to-PA translation (via /proc/pagemap) and kernel-space implementation (kernel module). Analyzes memory layout patterns across different allocation strategies.

  • Tech Stack: C, Linux Kernel Modules, User-space tools
  • Requirements: Linux kernel 5.x+, GCC compiler, kernel headers, /proc/pagemap support
  • Links: [GitHub - Coming Soon] | Project Folder

Technology Stack Summary

Languages

  • Systems: Rust, C
  • Compilers: C++17
  • Hardware: Chisel/Scala, RISC-V Assembly

Key Tools & Frameworks

  • LLVM (14+), xv6-riscv, QEMU, Linux Kernel, Criterion, Cargo, Chisel

Specialization Areas

  • Computer Architecture: Cache design, performance profiling, RISC-V
  • Systems Programming: Kernel modules, memory management, virtual drivers
  • Compiler Design: IR analysis, optimization passes, register allocation
  • Operating Systems: Filesystems, virtual memory, kernel development
  • Security: Privacy-preserving ML, threat analysis, compliance
  • Concurrent Programming: Lock-free algorithms, memory reclamation, benchmarking

Getting Involved

Most projects are available or coming soon to GitHub repositories. Individual project folders within this workspace contain detailed documentation, implementation details, and setup instructions. Feel free to reach out for questions or collaborations!

Contact: @pranav083